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专利名称：Integrated circuit of the complementary
technique having a substrate bias generator
发明人：TAKACS, DEZSOE, DIPL.-PHYS.,WINNERL,
JOSEF, DR.-ING.
申请号：EP86110757.1申请日：19860804公开号：EP0217065B1公开日：19910918
摘要：This substrate bias generator (16) applies a negative (positive) substrate biasvoltage to the p(n) substrate (1) into which n(p) troughs (2) are inserted. The sourceregions (3) of the n(p) channel FETs arranged in the substrate are connected to earthpotential. To avoid \"latch-up\" effects, the output (17) of the substrate bias generator (16)is connected via an electronic switch (S1) to a circuit point (8) connected to earthpotential, the switch being driven via the said output (17). ……
申请人：SIEMENS AKTIENGESELLSCHAFT,SIEMENS AKTIENGESELLSCHAFT
地址：WITTELSBACHERPLATZ 2; W-8000 MUENCHEN 2,WITTELSBACHERPLATZ 2; W-8000 MUENCHEN 2
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